@Scale
Google is introducing Virgo, a multiplane two-layer scale-out network fabric utilizing skinny links and CSIG congestion signaling, to enable non-blocking AI compute clusters across data center campuses.
AI-assisted summary of Live from SCCC: Virgo: Scale-out Data Center Network for AI | Jeongkeun "JK" Lee from Google — original source. Check the original for full context.
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## Background Published on YouTube by @Scale on August 31, 2026, this presentation features Jeongkeun "JK" Lee from Google speaking at the Santa Clara Convention Center. According to the page description, the talk introduces Virgo—a new backend scale-out fabric for east-west AI communication designed for deterministic latency, resilience, and high goodput—which will power Google Cloud's A5x bare-metal instances running the NVIDIA Vera Rubin NVL72 platform and serve as a key building block for next-gen TPUs.
## TL;DR Jeongkeun "JK" Lee presents Virgo, Google's purpose-built, 2-layer scale-out network fabric engineered specifically to handle the extreme resilience and latency demands of massive AI workloads. He details Virgo's multi-plane architecture powered by 200G SerDes skinny links, which ensures high resilience and non-blocking bisection capacity while decoupling east-west traffic from the Jupiter front-end network. Lee highlights adaptive routing, SRv6 source routing, and sub-millisecond telemetry required to catch transient congestion micro-bursts. Finally, he outlines CSIG (Congestion Signaling), an in-band telemetry protocol standardized through the Ultra Ethernet Consortium, alongside Google's roadmap to scale RDMA fabrics to metro distances.
## Atmosphere & style The presentation carries an authoritative yet humble tone, driven by Lee's reflective appreciation for the open technical community and his pride in Google's collaborative engineering milestones. It feels like an insider look into frontier data-center architecture, blending pragmatic engineering rigor with a forward-looking vision for AI infrastructure. The delivery is lucid, grounded, and technically rich, creating a atmosphere of shared technical breakthrough as past networking concepts find new life in modern AI deployments.
## Key takeaways - [00:03](https://www.youtube.com/watch?v=WuzpHLYnre0&t=3s) Jeongkeun "JK" Lee introduces Virgo, Google's brand-new scale-out data center network fabric purpose-built to address the bandwidth and latency demands of AI workloads. - [00:18](https://www.youtube.com/watch?v=WuzpHLYnre0&t=18s) Google's networking evolution spans four main eras: Internal Services (Jupiter, Orion, Apollo), Streaming (BBR, QUIC), Cloud (PSP, Falcon offload), and the current AI Era requiring campus-wide invisible failure resilience. - [02:18](https://www.youtube.com/watch?v=WuzpHLYnre0&t=138s) AI network design prioritizes five core principles: campus-supercomputer integration, lock-step hardware lifecycles with accelerators, inherent fabric resiliency, high-resolution telemetry, and rapid low-layer deployment. - [04:37](https://www.youtube.com/watch?v=WuzpHLYnre0&t=277s) Google AI data center architecture relies on three specialized layers: Scale-Up (NVLink/ICI for intra-pod), Scale-Out / Virgo (dedicated backend accelerator interconnect), and Front-End / Jupiter (storage and general compute). - [05:40](https://www.youtube.com/watch?v=WuzpHLYnre0&t=340s) Decoupling the Virgo scale-out fabric from the Jupiter front-end network enables independent annual hardware evolution for GPUs and TPUs without infrastructure disruption. - [06:50](https://www.youtube.com/watch?v=WuzpHLYnre0&t=410s) Virgo adopts a 2-layer collapsed flat topology paired with a multiplane architecture using native SerDes 'skinny links' to eliminate 3rd-tier Clos switches and minimize latency. - [08:03](https://www.youtube.com/watch?v=WuzpHLYnre0&t=483s) The multiplane skinny link design provides graceful degradation; in an 8-plane fabric, losing a single plane retains 87.5% of total bisection bandwidth. - [10:26](https://www.youtube.com/watch?v=WuzpHLYnre0&t=626s) Virgo leverages hardware adaptive routing and SRv6 source routing to maximize multipath utilization and allow bare-metal cloud customers to dictate packet paths. - [11:31](https://www.youtube.com/watch?v=WuzpHLYnre0&t=691s) Sub-millisecond telemetry visibility is required because standard 30-second average metrics mask severe periodic micro-bursts that saturate switch buffers. - [13:55](https://www.youtube.com/watch?v=WuzpHLYnre0&t=835s) Google introduced Congestion Signaling (CSIG), an in-band telemetry mechanism with a fixed-size header tag that carries only bottleneck link metrics back to the sender. - [15:51](https://www.youtube.com/watch?v=WuzpHLYnre0&t=951s) CSIG telemetry specifications have been published at SIGCOMM and are being standardized within the Ultra Ethernet Consortium (UEC). - [16:26](https://www.youtube.com/watch?v=WuzpHLYnre0&t=986s) Future Virgo developments focus on extending scale-out RDMA connectivity across metro distances and enabling multi-vendor switch interoperability.
## Detailed walkthrough ### [00:03](https://www.youtube.com/watch?v=WuzpHLYnre0&t=3s) Welcome and Google’s Data Center Networking History
Jeongkeun "JK" Lee from Google opens his talk at the @Scale conference by reflecting on his long relationship with the event, noting that his first attendance back in 2016 gave him a deep appreciation for the open industry perspectives shared on stage. Expressing immense gratitude, he explains that he is humbly representing numerous engineering teams at Google who are actively building and deploying **Virgo**, Google's brand-new scale-out data center fabric purpose-built for AI workloads.
Looking back across Google's history, Lee highlights several major inflection points in data center networking innovations that led up to this moment: * **The Internal Services Era:** Scaled global consumer applications like Google Search and Gmail using the **Jupiter** data center architecture alongside the **Orion** SDN control plane, and pioneered **Apollo** (the first production deployment of optical circuit switching in data centers). * **The Streaming Era:** Optimized real-time, low-jitter video delivery through novel transport and congestion control schemes such as **BBR** and **QUIC**. * **The Cloud Era:** Shifted performance offloads directly into hardware, introducing **PSP** encryption and the **Falcon** reliable transport protocol offloaded to NIC hardware. * **The AI Era (2026):** AI model sizes and bandwidth demands per chip are growing exponentially, requiring hyper-strict latency bounds and fabrics spanning multiple buildings and campuses where failure resilience must be transparent to the workload.
> "At this scale we know that everything breaks, and we should make these failures invisible to the AI workload."
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[02:18](https://www.youtube.com/watch?v=WuzpHLYnre0&t=138s) Core Design Principles for Scale-Out AI Fabrics
Lee outlines five core architectural principles guiding the development of Virgo, contrasting them with traditional generic networking designs:
1. **Campus-Supercomputer Integration:** The network must be co-designed as a dedicated component of a campus-scale AI supercomputer for a single specialized workload, rather than a generic multi-tenant infrastructure. 2. **Lock-Step Hardware Lifecycle:** Switches, optical transceivers, and fiber infrastructure are lifecycle-bound to the specific AI accelerators (GPUs/TPUs) they support; traditional requirements like backward compatibility are no longer primary constraints. 3. **Inherent Resiliency:** Resiliency must be baked directly into the fabric layout so that single link or switch failures never crash a multi-node machine learning training job. 4. **High-Resolution Telemetry:** Fine-grained observability is essential so transport protocols (like congestion control) and control planes can extract maximum throughput and availability. 5. **Rapid Deployment & Low Layer Count:** Multi-billion dollar AI clusters must be delivered to customers on tight timelines. Minimizing switching layers reduces total rack count and fiber complexity, dramatically speeding up cluster turn-up.
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[04:37](https://www.youtube.com/watch?v=WuzpHLYnre0&t=277s) The Three Networking Layers of Google AI Data Centers
Google’s modern AI data center architecture separates networking responsibilities into three distinct, specialized layers that collectively act as a unified compute domain:
* **Scale-Up Fabric (Orange):** High-bandwidth, sub-microsecond interconnect operating within a pod or rack scale. Connects accelerator chips directly using NVIDIA **NVLink** for GPU systems, or Google's Inter-Connect Interface (**ICI**) powered by optical switching for TPU systems. * **Scale-Out Fabric / Virgo (Yellow):** A dedicated, backend accelerator-to-accelerator network providing non-blocking cluster-wide connectivity across multiple pods and buildings. * **Front-End Fabric / Jupiter (Blue):** Connects the compute domain to distributed storage systems and general-purpose compute. Optimized for TCO, shared access, and incremental expansion across clusters within a building.
Lee emphasizes that decoupling the backend scale-out fabric (Virgo) from the front-end network (Jupiter) allows independent evolution cycles. This is vital for supporting different annual iterations of GPUs and TPUs without triggering systemwide disruptions during upgrades. Furthermore, Virgo can be engineered for 100% non-blocking bisection capacity while Jupiter remains cost-optimized for storage traffic.
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[06:50](https://www.youtube.com/watch?v=WuzpHLYnre0&t=410s) Virgo Topology: Two-Layer Collapsed Design & Multiplane Architecture
Zooming in on the Virgo topology, Lee highlights three primary architectural structural features: a collapsed 2-layer flat topology, multi-plane architecture with independent control domains, and cross-building campus expansion.
By maximizing switch radices, Google collapsed traditional 3-tier folded Clos networks into a flat **2-layer non-blocking topology**, significantly cutting down hops, latency, and jitter.
To scale the fabric across thousands of chips, Virgo introduces a **multiplane design** built on **skinny links**: * **Skinny Links:** Every network link operates at the native SerDes lane speed (e.g., 200 Gbps per lane in current deployments), rather than aggregating SerDes into wider 800G ports. This maximizes effective switch radix and enables massive 2-stage scaling. * **Plane Calculation:** The number of parallel network planes ($N$) equals the total bandwidth of an accelerator divided by the SerDes speed. For instance, a GPU pushing **1.6 Tbps** over 200G SerDes yields **8 skinny links**, resulting in an 8-plane network fabric. * **Graceful Degradation:** If one plane fails in an 8-plane system, the node retains **87.5% ($7/8$) of its total bisection bandwidth**, avoiding the catastrophic 50% or 100% bandwidth loss typical of conventional dual-homed network designs. * **Fully Meshed Multi-Rail Integration:** Unlike strict rail-aligned architectures, every accelerator chip connects across all $N$ network planes. In a 4-GPU system with 4 rails and 8 network planes, the fabric is fully meshed, allowing both intra-rail and cross-rail traffic to traverse the full bisection bandwidth in just 2 switch hops without requiring a 3rd switching tier.
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[10:26](https://www.youtube.com/watch?v=WuzpHLYnre0&t=626s) Multipath Routing: Adaptive Routing & SRv6
To maximize path utilization and lower tail latency across the multiplane topology, Virgo relies on advanced packet-level load-balancing mechanisms:
* **Adaptive Routing:** Hardware-based switch-level intelligence that dynamically steers packets around local switch congestion and quickly reroutes around downstream link failures. * **SRv6 Source Routing:** Allows bare-metal cloud customers (who supply their own host networking stacks, such as an RDMA stack) to directly monitor, tag, and dictate the exact end-to-end network path for every individual packet.
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[11:31](https://www.youtube.com/watch?v=WuzpHLYnre0&t=691s) High-Resolution Telemetry: Sub-Millisecond Visibility
Because AI training generates massive, tightly synchronized line-rate micro-bursts, conventional network telemetry misses critical transient congestion.
> "While the blue line still claims 10% load, the traffic bursts are redlining the switch buffer every few seconds."
To combat this, Virgo integrates two high-resolution telemetry channels: 1. **Management Plane Telemetry:** Switch CPUs stream fine-grained performance metrics (such as sub-millisecond port transmission utilization) directly to monitoring dashboards and control systems. 2. **Data Plane Telemetry (CSIG):** In-band congestion signals embedded in data packets for real-time host-transport consumption.
Lee presents a live telemetry dashboard comparison demonstrating the necessity of fine-grained sampling: * **30-Second Average View:** Shows a clean, healthy network operating at nominal bandwidth with massive headroom. * **Sub-Millisecond View:** Reveals severe, periodic micro-bursts where traffic spikes to **100% buffer saturation** every few seconds despite average utilization showing only ~10%.
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[13:55](https://www.youtube.com/watch?v=WuzpHLYnre0&t=835s) Congestion Signaling (CSIG) and UEC Standardization
Lee introduces **CSIG** (Congestion Signaling), an in-band telemetry mechanism designed as a practical, lightweight evolution of In-band Network Telemetry (INT).
While traditional INT stacked metadata headers from every hop—causing packet overhead to explode—CSIG maintains a **fixed-size header tag** carrying only the bottleneck link's information: * As a packet traverses switches (e.g., Hop 1 → Hop 2 → Hop 3), each switch updates the CSIG tag **only** if its local congestion state (e.g., available bandwidth normalized by port capacity or max hop delay) is worse than the upstream value already in the header. * The destination host receives the exact bottleneck metric alongside hints indicating whether congestion stemmed from first-hop multipath issues or last-hop incast congestion. * The receiver reflects this bottleneck telemetry back to the sender in ACK packets, allowing host transport layers to instantly throttle or adjust flows.
Lee shares a personal moment of pride, remembering that INT was his first P4 application while at Barefoot Networks, and expressing delight that CSIG builds upon those concepts into a cleaner, production-ready fabric standard.
- CSIG is being standardized within the **Ultra Ethernet Consortium (UEC)**. - Detailed technical papers on CSIG were presented by Google researchers at **SIGCOMM**.
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[16:26](https://www.youtube.com/watch?v=WuzpHLYnre0&t=986s) Next Steps: Metro Scale-Out, RDMA Long-Haul, and Interoperability
Looking ahead, Lee details Google's roadmap for scaling Virgo beyond single data center buildings:
* **Metro-Scale Expansion:** Extending Virgo fabrics across metro regions spanning hundreds of kilometers. * **Long-Haul RDMA:** Partnering within the UEC to solve the steep challenges of running high-performance RDMA over long-distance optical links using extended CSIG congestion feedback. * **Multi-Vendor Interoperability:** As fabrics span distributed campuses, integrating switch silicon from multiple hardware vendors requires strict protocol unification and open standards collaboration.
Closing his presentation, Lee encourages the audience to join the UEC community efforts and scan a provided QR code to explore Google’s published research on AI data center and WAN networking.
> "Some innovations we as a community have worked on so far for the last decade, like INT or source routing... were overlooked initially, but now they are finding real proving ground in AI."
## Notable quotes > [00:03](https://www.youtube.com/watch?v=WuzpHLYnre0&t=3s) At this scale we know that everything breaks, and we should make these failures invisible to the AI workload. — Jeongkeun "JK" Lee
> [11:31](https://www.youtube.com/watch?v=WuzpHLYnre0&t=691s) While the blue line still claims 10% load, the traffic bursts are redlining the switch buffer every few seconds. — Jeongkeun "JK" Lee
> [16:26](https://www.youtube.com/watch?v=WuzpHLYnre0&t=986s) Some innovations we as a community have worked on so far for the last decade, like INT or source routing... were overlooked initially, but now they are finding real proving ground in AI. — Jeongkeun "JK" Lee
## Mentioned Jeongkeun "JK" Lee, Google, Virgo, Jupiter, Orion, Apollo, BBR, QUIC, PSP, Falcon, NVIDIA, NVLink, Inter-Connect Interface (ICI), SRv6, CSIG, In-band Network Telemetry (INT), Ultra Ethernet Consortium (UEC), SIGCOMM, NVIDIA Vera Rubin NVL72, Google Cloud A5x, @Scale, Barefoot Networks
[Source](https://www.youtube.com/watch?v=WuzpHLYnre0)