All-In Podcast
Replacing digital matrix multiplication with continuous oscillator physics eliminates memory-shuffling bottlenecks, enabling a 1,000-fold efficiency gain to prevent AI inference from crashing into a grid energy wall within three years.
AI-assisted summary of Naveen Rao: 4D Computing, AI's Energy Wall & Beating Biology — original source. Check the original for full context.
Source published:
Key ideas
- Unconventional AI taped out the world's first physical dynamical computer in five months, demonstrating working image generation at approximately 500 nanojoules per generation—orders of magnitude below the millijoule range required by conventional GPUs. (15:28)
- Naveen Rao warns that AI infrastructure will hit a hard electrical power constraint within three years, noting that electricity already drives roughly 50% of operational token costs while total US data center draw remains capped near 40 gigawatts. (4:45)
- The company aims to achieve a 1,000x efficiency gain within three and a half years by replacing Von Neumann architectures and matrix multiplications with '4D computing' that exploits continuous oscillator physics. (3:23)
- A commercial turnkey data center rack is slated for delivery within two years, designed to accept standard network tokens and convert existing frontier models at the whole-model layer via native Python abstractions. (19:31)
Detailed notes
## Background Published on YouTube by the All-In Podcast on September 21, 2026, this video features a presentation by deep-tech entrepreneur Naveen Rao followed by a fireside discussion with Chamath Palihapitiya. According to the show description, the talk examines AI's looming energy wall, 4D computing, the replacement of traditional computing abstractions with dynamical systems, and the commercial path toward productizing an entirely new class of hardware.
## TL;DR Naveen Rao, former founder of Nervana Systems and MosaicML, outlines his new venture Unconventional AI, which aims to break through AI's impending energy bottleneck by pursuing a 1,000x gain in power efficiency. Contrasting legacy von Neumann architectures—which waste massive amounts of energy endlessly shuffling bits—with biological brains operating on mere milliwatts, Rao advocates for eliminating digital abstractions in favor of continuous dynamical systems. His team demonstrated this paradigm with their open-source image model UNO and a taped-out physical 4D dynamical chip that slashes generation energy to 500 nanojoules without native matrix multiplication. Chamath Palihapitiya joins the stage to probe the commercial realities, revealing a two-year roadmap toward a turnkey data center rack programmed through high-level Python libraries rather than traditional CUDA kernels.
## Atmosphere & style The presentation carries a calm, intellectually commanding, and unapologetically ambitious atmosphere rooted in first-principles physics rather than standard tech hype. Rao speaks with quiet, seasoned authority, methodically contrasting the absurd energy draw of modern data centers against the elegant eight-milliwatt efficiency of a squirrel. When Chamath steps onstage, the dynamic shifts into an energized, inquisitive exchange; Chamath's visible astonishment at the audacity of 'beating biology' meets Rao's measured, pragmatic explanations of system integration and team dynamics.
## Bulletin - [15:28](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=928s) Unconventional AI taped out the world's first physical dynamical computer in five months, demonstrating working image generation at approximately 500 nanojoules per generation—orders of magnitude below the millijoule range required by conventional GPUs. - [04:45](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=285s) Naveen Rao warns that AI infrastructure will hit a hard electrical power constraint within three years, noting that electricity already drives roughly 50% of operational token costs while total US data center draw remains capped near 40 gigawatts. - [03:23](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=203s) The company aims to achieve a 1,000x efficiency gain within three and a half years by replacing Von Neumann architectures and matrix multiplications with '4D computing' that exploits continuous oscillator physics. - [19:31](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1171s) A commercial turnkey data center rack is slated for delivery within two years, designed to accept standard network tokens and convert existing frontier models at the whole-model layer via native Python abstractions.
## Key takeaways - [04:45](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=285s) AI scaling will hit an unavoidable energy wall within approximately three years because energy generation scales linearly while computational demand expands exponentially. - [04:45](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=285s) Data center constraints have shifted from square footage, networking, and GPU availability directly to power contracts, with electricity representing roughly 50% of the operating cost of serving a token. - [07:04](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=424s) Biological systems prove massive computational efficiency is physically possible: the human brain operates on 20 watts, while a squirrel executes real-time 3D spatial navigation on just 8 milliwatts. - [08:05](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=485s) The primary cause of AI compute inefficiency is data movement rather than calculation: while the human cortex transfers only 16 Gbps across 13–14 billion neurons, a high-end GPU shuffles 30 Tbps across external memory interfaces. - [10:24](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=624s) Digital computers waste immense energy by forcing continuous transistor physics into binary abstractions, linear algebra routines, and floating-point matrix multiplications. - [10:24](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=624s) Physical dynamical systems—such as mechanically coupled metronomes synchronizing across a movable surface—demonstrate that complex computation naturally emerges from simple, local physical rules without centralized control. - [13:05](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=785s) Testing with the UNO image generation model proved that introducing structural sparsity into coupled oscillator networks prevents quadratic connection scaling and dramatically improves training stability. - [15:28](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=928s) Unconventional AI fabricated a physical dynamical prototype in five months that completed image generation consuming only 500 nanojoules, drastically undercutting GPU energy consumption. - [15:28](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=928s) '4D computing' eliminates the Von Neumann memory-compute bus by collocating state and processing across three physical spatial dimensions alongside continuous temporal state dynamics. - [17:55](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1075s) Modern computing operates roughly 10 billion times (10¹⁰) away from thermodynamic physical limits, whereas mammalian biology operates within just one to two orders of magnitude of physical limits. - [17:55](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1075s) Under Jevons paradox, reducing inference energy costs by 1,000x will not contract industry revenue, but will instead dramatically expand overall demand and unlock planetary-scale autonomous compute. - [19:31](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1171s) The planned commercial release is a turnkey data center rack ready within two years, providing a drop-in token interface while executing internal operations through dynamical state transitions rather than native matrix multiplications. - [19:31](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1171s) Porting existing neural network models to dynamical hardware is done via an upfront transformation at the macro model layer rather than by mapping discrete arithmetic kernels. - [21:37](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1297s) Software programmability is delivered via high-level Python libraries tailored for time-varying states and physical stochastic dynamics, bypassing the need for a low-level CUDA-like instruction set.
## Detailed walkthrough ### [00:00](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=0s) Introduction and Naveen Rao's Background
Naveen Rao is introduced as an "outlier founder" who has successfully built and exited two major deep-tech companies, having previously scaled an enterprise from roughly $20 million to $700–$800 million. Taking the stage, Rao frames AI as the next fundamental evolution of humanity and expresses his enthusiasm for speaking at what he calls an "anti-doomer conference."
Reflecting on his journey, Rao shares that his interest in intelligent machines began in childhood. He started programming around the age of five or six after his family got a computer in 1978, viewing coding like solving puzzles. Driven by science fiction and a fascination with building intelligent machines, he trained as an electrical engineer. After an initial career designing traditional computers, he went back to academia to earn a PhD in neuroscience to study biological intelligence firsthand, aiming to apply those principles back to computing.
In 2014, long before artificial intelligence became a mainstream buzzword, Rao co-founded Nervana Systems, one of the earliest dedicated AI chip companies. Although he feels he sold Nervana to Intel "way too early," he went on to build and lead Intel's AI products group. By 2020, seeing the imminent rise of large language models, he turned his focus toward the scaling infrastructure needed to train them, co-founding MosaicML. MosaicML streamlined GPU platformization and erupted into high demand after ChatGPT launched in late 2022. Databricks acquired MosaicML in 2023, where its technology quickly grew to generate roughly one-quarter of Databricks' total revenue.
- **Nervana Systems**: Founded in 2014 as an early pioneer in AI hardware accelerators; acquired by Intel. - **MosaicML**: Founded in 2020 to build scalable infrastructure for training large AI models; acquired by Databricks in 2023. - **Databricks Revenue Impact**: The platform built by MosaicML contributes approximately 25% of Databricks' overall revenue.
---
[03:23](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=203s) Rethinking the Machine: Unconventional AI
Rao introduces his latest venture, Unconventional AI, which is built on the belief that traditional computing architectures must be rethought from first principles to break through the energy wall. While computers have operated fundamentally the same way for decades, Unconventional AI is pursuing a singular objective: achieving a 1,000x improvement in power efficiency. Rao originally set a five-year target for this milestone, but has accelerated the roadmap to three and a half years because AI-driven tools have enabled the team to solve deep scientific hurdles far faster than anticipated.
To achieve this, the company operates as a tightly integrated, "top-to-bottom" multidisciplinary organization:
```mermaid flowchart TD accTitle: Unconventional AI Organizational Stack accDescr: A top-to-bottom flow showing theorists feeding into modeling, circuit design, and final product packaging.
subgraph TheoryAndModeling["Theory & Validation"] A["Theorists<br>(Math & Theoretical Neuroscience PhDs)"] --> B["Model Builders<br>(Real Data & Benchmarks)"] end
subgraph HardwareExecution["Physical Implementation"] B --> C["Circuit Architects & Designers<br>(Physical Circuit Simulation)"] C --> D["Systems Engineering<br>(Boards, Systems & End Products)"] end ```
The stack begins with theorists—holders of doctorates in mathematics and theoretical neuroscience—who devise mathematical abstractions that inherently minimize data movement. Next, model builders validate these mathematical concepts against real datasets and empirical criteria. Once proven, physical circuit architects and chip designers implement and simulate these algorithms in custom silicon circuits, which systems engineers ultimately package into boards, complete server systems, and commercial products.
---
[04:45](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=285s) AI's Looming Energy Crisis
Rao argues that AI's expansion faces a hard physical constraint: available electrical power. Using Google as a reference because of its public disclosures, he highlights that Google processes over 3.2 quadrillion tokens every month. Assuming a conservative efficiency baseline of roughly 10 joules per token, that scale of inference consumes approximately 12 gigawatts of power.
``` Total Global Data Center Capacity: < 100 GW US Data Center Allocation: ~ 40 GW Google AI Token Processing Alone: 12 GW (at 10 J/token across 3.2Q tokens/mo) ```
Because total US data center draw is around 40 gigawatts—representing roughly half of global data center capacity (<100 GW)—a single hyperscaler's inference workload can theoretically demand a substantial fraction of the country's entire data center grid. With larger frontier models demanding more energy and user demand growing exponentially, Rao warns that the computing sector is on track to hit a hard energy wall within about three years. While market value is projected to reach $1 trillion or more by 2030, energy generation scales only linearly. Technology must bridge that widening divide.
This dynamic has fundamentally changed how data center infrastructure is developed and valued: 1. **Floor & Rack Space**: Early data centers were bottlenecked primarily by physical square footage and real estate. 2. **Networking**: The bottleneck shifted toward high-speed inter-rack switches and interconnect fabrics. 3. **Silicon (GPUs)**: Compute clusters were constrained by the supply and delivery of high-end GPUs. 4. **Power Contracts (Present Day)**: Operators secure multi-megawatt energy contracts first, and only then design racks and hardware to monetize every individual watt.
Today, electricity alone accounts for approximately 50% of the operational cost of serving an AI token, with the remainder split across capital expenditure (amortized hardware) and physical facilities. Unconventional AI's core economic proposition is simple: enabling data center operators to monetize their power contracts at 1,000x greater output per watt than legacy hardware.
---
[07:04](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=424s) Biology as Proof: The Efficiency of the Brain
To prove that orders-of-magnitude gains in computational efficiency are physically possible, Rao points to evolutionary biology. While modern clusters burn megawatts to run large models, the human brain performs general intelligence on just 20 watts of power. Rao highlights that the scaling across animal brains is even more astonishing:
- **Monkeys**: Operate on roughly 1 watt—roughly equivalent to the power draw of an average smartphone. - **Rats and Bats**: Function entirely within milliwatt power budgets. - **Squirrels**: Run their entire central nervous system on a mere 8 milliwatts of power.
Rao emphasizes the squirrel as a prime example of real-time physical precision: a squirrel can execute complex, high-speed spatial navigation between tree branches flawlessly a thousand times out of a thousand, powered by 8 milliwatts. A modern smartphone battery could theoretically power more than 100 complete squirrel brains simultaneously. Biology proves that a physical substrate can generate real-time intelligent behavior at microscopic energy costs.
---
[08:05](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=485s) The Cost of Moving Bits
Echoing the philosophy that "I don't feel like we truly understand something until we can create it," Rao explains that today's artificial intelligence systems are fundamentally inefficient because of how computers were originally designed. The overwhelming majority of energy in modern computers is spent not on computation itself, but on moving information back and forth between memory and compute units.
| System | Processing Elements | Data Moved In/Out of Memory | |:--- |:--- |:--- | | **Human Cortex** | ~13–14 billion neurons | ~16 billion bits per second (16 Gbps) | | **Modern High-End GPU** | Billions of transistors / streaming multiprocessors | ~30 trillion bits per second (30 Tbps) |
While the human cortex moves only 16 gigabits per second across its roughly 13 to 14 billion neurons, a single high-performance accelerator or GPU shuffles nearly 30 terabits per second across off-chip memory interfaces alone—with on-chip data movement running 10x to 100x higher still. This relentless shuffling of bits is the root cause of the AI energy wall, an artifact of digital architectures established in the 1930s and 1940s that modern silicon still largely follows.
[09:19](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=559s) The Limits of Von Neumann Architecture and Moore's Law
The foundational architecture of computing has not experienced a fundamental paradigm shift since its inception. Traditional machines rely on a structure where memory sits on the outside, separated from the computing core, requiring bits to be shuffled back and forth continuously. While this design yields very high execution speeds, it demands massive data movement. Computers were historically optimized exclusively for raw speed rather than energy efficiency. For example, the ENIAC—built in 1945 to calculate artillery trajectories—was created solely to outperform human "computers" who previously performed the arithmetic by hand. Today, computers are still marketed on speed metrics (such as one machine being twice as fast as another), without accounting for energy consumption.
For decades, the industry relied on packing more transistors onto silicon, but Dennard scaling halted frequency gains and single-thread performance growth, and efficiency gains have now stalled. Moore's Law—the predictable shrinkage of transistors—has largely reached its end, meaning engineers can no longer count on smaller nodes to deliver automatic efficiency improvements.
- **Historical Precedent**: ENIAC (1945) replaced human calculation teams purely to increase calculation speed. - **Physical Roadblocks**: Dennard scaling and single-thread scaling plateaued years ago, and the end of Moore's Law now limits physical efficiency improvements.
---
[10:24](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=624s) Cutting Out the Middleman: Physics, Abstractions, and Dynamical Systems
To bypass the energy wall, computing must "cut out the middleman" by stripping away layers of lossy abstraction. Digital logic—reducing the physical world strictly to ones and zeros—is itself an artificial construct; a physical transistor naturally occupies continuous intermediate states between high and low voltages, but engineers force it to behave binarily. Stacking higher-level software, neural networks, and linear algebra routines on top of this binary layer introduces compounding inefficiencies. In contrast, the human brain performs intelligence without floating-point math or matrix multiplication; cognitive processing emerges directly from the continuous physics of interacting neurons.
```mermaid flowchart TD accTitle: Conventional vs Dynamical Computing Stack accDescr: Flow diagram contrasting the layered abstractions of traditional computing with the direct physics approach of dynamical computing.
subgraph Conv["Traditional Digital AI Stack"] direction TB P1["Semiconductor Physics"] --> D1["Digital Abstraction: 0s & 1s"] D1 --> M1["Linear Algebra & Floating-Point"] M1 --> N1["Neural Networks & Generative AI"] end
subgraph Dynamic["Dynamical Computing Stack"] direction TB P2["Semiconductor Physics & Dynamics"] --> N2["Direct Neural Computation: UNO"] end ```
Computation exists throughout nature via dynamical systems theory, where complex, emergent behaviors arise from simple local rules without centralized instruction. Flocking birds evaluate only their immediate left and right neighbors to maintain coordinated flight, and ant colonies solve complex logistical problems without centralized oversight.
- **The Metronome Analogy**: If multiple out-of-phase mechanical metronomes are placed onto a shared rigid plank that rolls freely, their tiny physical forces push through the plank until every metronome locks into identical phase synchronization. - **System Variations**: Depending on system parameters and initial states, oscillators can settle into split-phase states or synchronized clusters, demonstrating self-organizing physical computation.
---
[13:05](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=785s) Model UNO and the Power of Sparsity
To demonstrate that physical oscillator networks could run generative AI, a model named UNO was released and open-sourced. UNO is an image generation model that simulates networks of coupled oscillators. When conditioned on target prompts (such as generating an airplane, car, or bird), the network settles along distinct state-space trajectories—mapping how the phases of the coupled oscillators evolve across time to yield the final generated visual output.
A central engineering challenge in coupled systems is scaling. Fully interconnecting elements results in quadratic growth:
$$\mathcal{O}(n^2)$$
Connecting 10 elements requires 100 connections ($10 \times 10$), while scaling to 1,000 elements explodes to 1,000,000 connections ($1,000 \times 1,000$). To solve this bottleneck, sparsity was introduced. Rather than degrading performance, pruning the vast majority of physical connections actually stabilized training dynamics and improved system performance. The resulting sparse architecture proved more scalable, more efficient, and easier to train in both software simulations and hardware implementations.
---
[15:28](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=928s) The First Physical Dynamical Computer and 4D Architecture
This research culminated in the development of the world's first physical dynamical computer. The company began operating in earnest in January without a complete team, yet taped out the physical chip design to the semiconductor foundry on June 1st—delivering a working prototype in just five months. The fabricated silicon returned to the lab and successfully generated its first functional images.
```mermaid flowchart LR accTitle: Von Neumann Architecture vs 4D Dynamical Computing accDescr: Architectural comparison between traditional Von Neumann memory transfer and collocated 4D computing.
subgraph VN["Von Neumann GPU / CPU"] direction LR Mem["External Memory"] <-->|"High-Energy Bus Shuffling"| Comp["Compute ALU"] end
subgraph FourD["4D Dynamical Machine"] direction TB Node["Unified Compute + Memory Element"] Time["Temporal Evolution: State Dynamics"] Node --- Time end ```
The physical prototype achieves unmatched power reduction:
- **Energy Consumption**: Generating an image requires roughly 500 nanojoules ($500\text{ nJ}$, where $1\text{ nJ} = 10^{-9}\text{ J}$). - **Comparison to Conventional GPUs**: Standard GPUs consume energy on the order of millijoules ($10^{-3}\text{ J}$) per equivalent generation task, making the dynamical chip multiple orders of magnitude more energy-efficient. - **Unified Architecture**: Unlike CPUs and GPUs—which adhere to the Von Neumann bottleneck by moving data across a high-energy memory bus—the dynamical computer fuses memory and compute into each individual element. - **"4D Computing" Defined**: The architecture harnesses all three physical spatial dimensions through planar routing and vertical die-stacking (3D), combined with the continuous time dimension of the dynamical state evolution (1D).
This architecture establishes a path toward building computing systems that approach fundamental thermodynamic limits, focusing directly on maximizing "intelligence per watt."
[17:55](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1075s) Thermodynamic Limits, Beating Biology, and Jevons Paradox
Naveen Rao frames the physical horizon of computing by contrasting biological evolution with silicon engineering. While mammalian brains operate within just one or two orders of magnitude of the ultimate thermodynamic limits of physics, modern electronic computing sits squarely on the far left of the efficiency curve—roughly 10 billion times ($10^{10}$) less efficient. Rao projects that within three and a half years, his company can push silicon to the physical limits of 2D lithography. The foundational thesis is audacious: "The overarching goal of this company is to beat biology." Reaching that threshold would unlock ubiquitous intelligence, allowing compute to permeate everything from decentralized infrastructure to dynamic swarms of billions of autonomous robots that assemble on demand to tackle planetary-scale challenges.
Such a drastic leap in efficiency would fundamentally restructure the physical footprint of artificial intelligence. Instead of constructing monolithic, gigawatt-scale data center facilities that stress power grids, computing could decentralize into smaller, adaptive, and environmentally friendly local nodes. Addressing the economic implications, Rao invokes Jevons paradox to show why a radical collapse in inference costs will not shrink industry revenues:
> "There's a concept called Jevons paradox where when you drop the underlying cost of an asset, you actually consume more than the drop of that asset. So, if you make something half the price, you'll consume more than 2x. If you make something 1,000th the price, you'll consume more than 1,000th of it. And I think this will create the largest market that humanity's ever seen."
```mermaid flowchart TD accTitle: The Path to Beating Biological Efficiency accDescr: Progression from current computing inefficiency to the thermodynamic limits of biology and beyond.
subgraph Efficiency["Physical Computing Horizons"] A["Current 2D Computing<br/>10¹⁰ from thermodynamic limit"] --> B["3.5-Year Target<br/>Limits of 2D lithography"] B --> C["Mammalian Brains<br/>1–2 orders of magnitude away"] C --> D["Ultimate Goal<br/>'Beat Biology'"] end
subgraph Impact["Systemic Ramifications"] D --> E["Decentralized Local Compute<br/>Replaces gigawatt mega-facilities"] D --> F["Jevons Paradox Unleashed<br/>1000x cost drop expands total spend"] end ```
- **Thermodynamic Gap:** Mammalian brains run roughly 10 to 100 times above physical limits, whereas modern silicon chips lag by a factor of 10,000,000,000. - **2D Lithography Roadmap:** The engineering plan aims to reach the absolute limits of two-dimensional lithography within 3.5 years. - **Decentralization Trend:** Compute architecture is expected to transition away from centralized gigawatt facilities into widespread, localized, and resilient data centers.
---
[19:31](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1171s) Chamath Joins: The Data Center Rack and Abandoning MatMul
Chamath Palihapitiya joins the stage, visibly taken aback by the ambition of the presentation ("I mean that was extremely unexpected. I got to say that was pretty amazing"). He immediately presses Rao on the commercial reality of bringing such an architecture to market, pointing out that Jensen Huang and NVIDIA rely on a massive, coordinated web of foundries, packagers, and system integrators. Chamath asks what it will realistically take in time and complexity to turn this into a usable product. Rao responds that they are within two years of delivering a complete product: a turnkey data center rack system. From the customer's perspective, the interface remains straightforward—"tokens in, tokens out through a network cable"—yet the computational mechanics inside the chassis represent an absolute departure from von Neumann and GPU designs.
Chamath pushes further on backward compatibility, asking whether the tech can accommodate prevailing industry architectures that have spent years hyper-optimizing around KV caching and mechanically reductive abstractions. Rao acknowledges that while switching always entails a tradeoff between efficiency gains and migration friction, they designed the system to make adoption irresistible. Crucially, the porting process does not happen at the micro-operations or kernel level; instead, existing models are converted at the higher model layer, a procedure that requires a dedicated upfront compute pass. When Chamath asks whether elemental primitives like standard matrix multiplications (MatMul) exist on the silicon, Rao reveals they do not exist natively:
> "You can characterize it as MatMul, but it doesn't implement it as MatMul... It implements it as a sort of time-varying behavior. But each one of those time steps you can analyze as basically a matrix of the current state times a transition matrix."
- **Time to Market:** Projected full product availability within two years. - **Form Factor:** Delivered as an integrated data center rack system serving tokens directly over high-speed networking. - **Abstraction Level:** Legacy models port at the whole-model layer rather than compiling discrete operation kernels. - **Non-MatMul Execution:** Replaces traditional arithmetic logic units with continuous dynamical state transitions ($S_{t+1} = S_t \times T$).
---
[21:37](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1297s) Assembling the Team and Building the Software Bridge
Chamath asks about the human capital required to build a machine so detached from standard computer architecture: "When you're building a team like this, who are these people? These are biologists plus physicists plus what?" Rao explains that the core challenge lies in marrying two disciplines that have historically lived in total isolation: theorists specializing in dynamical systems theory—a mathematical field spanning over a century—and hard-nosed silicon chip designers. Getting pure mathematicians and physical hardware engineers to align, communicate, and construct a unified system has been one of the steepest organizational hurdles inside the company.
Chamath inquires about the software translation layer, asking what serves as their CUDA equivalent to bridge abstract model definitions down to this radical silicon. Rao shares that rather than inventing a convoluted low-level instruction set or a proprietary variant of CUDA, they have built high-level runtime libraries in Python. This software layer provides researchers with a familiar environment while offering specialized primitives designed to express time-varying system states and stochastic physical behaviors directly. Chamath closes the session by praising the raw scope of the undertaking, calling the initiative "incredibly impressive" and "so ambitious."
- **Cross-Disciplinary Team:** Blends 100-year-old mathematical dynamical systems theory with modern semiconductor silicon design. - **Programmability:** High-level Python libraries replace low-level CUDA kernels, enabling developers to declare stochastic behaviors and continuous time steps directly.
## Notable quotes > [00:00](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=0s) anti-doomer conference — Naveen Rao
> [00:00](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=0s) way too early — Naveen Rao
> [08:05](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=485s) I don't feel like we truly understand something until we can create it — Naveen Rao
> [17:55](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1075s) The overarching goal of this company is to beat biology. — Naveen Rao
> [17:55](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1075s) There's a concept called Jevons paradox where when you drop the underlying cost of an asset, you actually consume more than the drop of that asset. So, if you make something half the price, you'll consume more than 2x. If you make something 1,000th the price, you'll consume more than 1,000th of it. And I think this will create the largest market that humanity's ever seen. — Naveen Rao
> [19:31](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1171s) I mean that was extremely unexpected. I got to say that was pretty amazing — Chamath Palihapitiya
> [19:31](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1171s) tokens in, tokens out through a network cable — Naveen Rao
> [19:31](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1171s) You can characterize it as MatMul, but it doesn't implement it as MatMul... It implements it as a sort of time-varying behavior. But each one of those time steps you can analyze as basically a matrix of the current state times a transition matrix. — Naveen Rao
> [21:37](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1297s) When you're building a team like this, who are these people? These are biologists plus physicists plus what? — Chamath Palihapitiya
> [21:37](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1297s) incredibly impressive — Chamath Palihapitiya
> [21:37](https://www.youtube.com/watch?v=yAsrMA_ADPc&t=1297s) so ambitious — Chamath Palihapitiya
## Mentioned Naveen Rao, Chamath Palihapitiya, Jensen Huang, Nervana Systems, Intel, MosaicML, Databricks, ChatGPT, Unconventional AI, Google, ENIAC, UNO, NVIDIA, CUDA, Python
## Video description (0:00) Welcome Naveen Rao (4:45) Is energy really the problem? The cost of a token, power contracts & the gap to close (10:24) Cutting out the middleman: abstractions, dynamical systems & a new kind of machine (19:40) Chamath joins: the path to product, porting existing models & building the team
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[Source](https://www.youtube.com/watch?v=yAsrMA_ADPc)